Thermo-mechanical reliability of through-silicon via (TSV) structures is affected by the residual stress, which is generated during thermal cycling in back end of line (BEOL) stack manufacturing, and by the 3D bonding processes. In this study, micro-Raman spectroscopy is employed for characterization of the local residual surface layer stress in Si due to the proximity of copper vias. We found that stress reduction in silicon in the vicinity of the TSVs is due to the relaxation after post-annealing. The residual thermal stress is relaxed more in the direction where the neighboring TSVs exist. Re-crystallization due to grain growth and also plastic and viscous behavior after annealing at high temperature might lead to higher stress relaxation that can impact on decreasing the keep-out zone (KOZ) size. Furthermore, the effect of post-annealing of Cu-TSVs in the generation of via protrusion is investigated. Cu protrusion mainly occurs due to the plastic and viscous behavior of Cu in the TSV. It was predicted from earlier publications, that the protrusion height is increasing with increasing the annealing temperature. However, we show that it might decrease at higher annealing temperatures of about 380 °C. This result can be associated with large modification of the copper grain growth and/or stress-induced grain sliding.
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Atomic and Molecular Physics, and Optics
- Condensed Matter Physics
- Surfaces, Coatings and Films
- Electrical and Electronic Engineering