Saturation current and on-resistance correlation during during repetitive short-circuit conditions on SiC JFET transistors

M. Berkani, S. Lefebvre, Z. Khatir

Результат исследований: Материалы для журналаСтатья

11 Цитирования (Scopus)

Выдержка

This letter presents a correlation between the reduction of the saturation current level and increase of on-state resistance and the top-metal ageing of normally ON SiC junction gate field effecttransistors. For this study, ageing has been obtained using repetitive short-circuit operations. Among monitored parameters during ageing, on-state resistance and short-circuit current level are those, which have the strongest evolution. The top-metal degradation has been characterized via the on-state resistance measurement during ageing. In particular, we clearly show that the top-metal restructuration due to ageing leads to an additional voltage drop between gate and source terminals and results to a lower gate-source junction voltage.

Язык оригиналаАнглийский
Номер статьи6314491
Страницы (с-по)621-624
Число страниц4
ЖурналIEEE Transactions on Power Electronics
Том28
Номер выпуска2
DOI
СостояниеОпубликовано - 1 янв 2013
Опубликовано для внешнего пользованияДа

Отпечаток

Junction gate field effect transistors
Short circuit currents
Transistors
Aging of materials
Metals
Degradation
Electric potential

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Цитировать

Saturation current and on-resistance correlation during during repetitive short-circuit conditions on SiC JFET transistors. / Berkani, M.; Lefebvre, S.; Khatir, Z.

В: IEEE Transactions on Power Electronics, Том 28, № 2, 6314491, 01.01.2013, стр. 621-624.

Результат исследований: Материалы для журналаСтатья

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