Failure modes and robustness of SiC JFET transistors under current limiting operations

Mounira Bouarroudj-Berkani, Stéphane Lefebvre, Dhouha Othman, Sabrine Moumen Sabrine, Zoubir Khatir, Tarek Ben Salah

Результат исследований: Материалы для книги/типы отчетовМатериалы для конференции

8 Цитирования (Scopus)

Аннотация

The paper presents results of ageing tests of normally-on SiC JFET prototype transistors from SiCED subjected to repetitive short circuit modes corresponding to current limitation operations. Experimental tests are detailed and the evolution during tests of ageing indicators like on-state resistance and saturation current are discussed. Finally, thermal simulation results are presented in order to understand and explain evolutions of some ageing indicators.

Язык оригиналаАнглийский
Название основной публикацииProceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011
СостояниеОпубликовано - 11 окт 2011
Опубликовано для внешнего пользованияДа
Событие2011 14th European Conference on Power Electronics and Applications, EPE 2011 - Birmingham, Великобритания
Продолжительность: 30 авг 20111 сен 2011

Серия публикаций

НазваниеProceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011

Конференция

Конференция2011 14th European Conference on Power Electronics and Applications, EPE 2011
СтранаВеликобритания
ГородBirmingham
Период30.8.111.9.11

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • Цитировать

    Bouarroudj-Berkani, M., Lefebvre, S., Othman, D., Sabrine, S. M., Khatir, Z., & Salah, T. B. (2011). Failure modes and robustness of SiC JFET transistors under current limiting operations. В Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011 [6020356] (Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011).