Failure modes and robustness of SiC JFET transistors under current limiting operations

Mounira Bouarroudj-Berkani, Stéphane Lefebvre, Dhouha Othman, Sabrine Moumen Sabrine, Zoubir Khatir, Tarek Ben Salah

Результат исследований: Материалы для книги/типы отчетовМатериалы для конференции

8 Цитирования (Scopus)

Выдержка

The paper presents results of ageing tests of normally-on SiC JFET prototype transistors from SiCED subjected to repetitive short circuit modes corresponding to current limitation operations. Experimental tests are detailed and the evolution during tests of ageing indicators like on-state resistance and saturation current are discussed. Finally, thermal simulation results are presented in order to understand and explain evolutions of some ageing indicators.

Язык оригиналаАнглийский
Название основной публикацииProceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011
СостояниеОпубликовано - 11 окт 2011
Опубликовано для внешнего пользованияДа
Событие2011 14th European Conference on Power Electronics and Applications, EPE 2011 - Birmingham, Великобритания
Продолжительность: 30 авг 20111 сен 2011

Серия публикаций

НазваниеProceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011

Конференция

Конференция2011 14th European Conference on Power Electronics and Applications, EPE 2011
СтранаВеликобритания
ГородBirmingham
Период30.8.111.9.11

Отпечаток

Junction gate field effect transistors
Failure modes
Transistors
Aging of materials
Short circuit currents

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Цитировать

Bouarroudj-Berkani, M., Lefebvre, S., Othman, D., Sabrine, S. M., Khatir, Z., & Salah, T. B. (2011). Failure modes and robustness of SiC JFET transistors under current limiting operations. В Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011 [6020356] (Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011).

Failure modes and robustness of SiC JFET transistors under current limiting operations. / Bouarroudj-Berkani, Mounira; Lefebvre, Stéphane; Othman, Dhouha; Sabrine, Sabrine Moumen; Khatir, Zoubir; Salah, Tarek Ben.

Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011. 2011. 6020356 (Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011).

Результат исследований: Материалы для книги/типы отчетовМатериалы для конференции

Bouarroudj-Berkani, M, Lefebvre, S, Othman, D, Sabrine, SM, Khatir, Z & Salah, TB 2011, Failure modes and robustness of SiC JFET transistors under current limiting operations. в Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011., 6020356, Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011, 2011 14th European Conference on Power Electronics and Applications, EPE 2011, Birmingham, Великобритания, 30.8.11.
Bouarroudj-Berkani M, Lefebvre S, Othman D, Sabrine SM, Khatir Z, Salah TB. Failure modes and robustness of SiC JFET transistors under current limiting operations. В Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011. 2011. 6020356. (Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011).
Bouarroudj-Berkani, Mounira ; Lefebvre, Stéphane ; Othman, Dhouha ; Sabrine, Sabrine Moumen ; Khatir, Zoubir ; Salah, Tarek Ben. / Failure modes and robustness of SiC JFET transistors under current limiting operations. Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011. 2011. (Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011).
@inproceedings{552a6a877c8d497f9ce9814af7a6ec61,
title = "Failure modes and robustness of SiC JFET transistors under current limiting operations",
abstract = "The paper presents results of ageing tests of normally-on SiC JFET prototype transistors from SiCED subjected to repetitive short circuit modes corresponding to current limitation operations. Experimental tests are detailed and the evolution during tests of ageing indicators like on-state resistance and saturation current are discussed. Finally, thermal simulation results are presented in order to understand and explain evolutions of some ageing indicators.",
keywords = "Current limiter, JFET, Power semiconductor, Robustness, Short circuit, Silicon Carbide",
author = "Mounira Bouarroudj-Berkani and St{\'e}phane Lefebvre and Dhouha Othman and Sabrine, {Sabrine Moumen} and Zoubir Khatir and Salah, {Tarek Ben}",
year = "2011",
month = "10",
day = "11",
language = "English",
isbn = "9781612841670",
series = "Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011",
booktitle = "Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011",

}

TY - GEN

T1 - Failure modes and robustness of SiC JFET transistors under current limiting operations

AU - Bouarroudj-Berkani, Mounira

AU - Lefebvre, Stéphane

AU - Othman, Dhouha

AU - Sabrine, Sabrine Moumen

AU - Khatir, Zoubir

AU - Salah, Tarek Ben

PY - 2011/10/11

Y1 - 2011/10/11

N2 - The paper presents results of ageing tests of normally-on SiC JFET prototype transistors from SiCED subjected to repetitive short circuit modes corresponding to current limitation operations. Experimental tests are detailed and the evolution during tests of ageing indicators like on-state resistance and saturation current are discussed. Finally, thermal simulation results are presented in order to understand and explain evolutions of some ageing indicators.

AB - The paper presents results of ageing tests of normally-on SiC JFET prototype transistors from SiCED subjected to repetitive short circuit modes corresponding to current limitation operations. Experimental tests are detailed and the evolution during tests of ageing indicators like on-state resistance and saturation current are discussed. Finally, thermal simulation results are presented in order to understand and explain evolutions of some ageing indicators.

KW - Current limiter

KW - JFET

KW - Power semiconductor

KW - Robustness

KW - Short circuit

KW - Silicon Carbide

UR - http://www.scopus.com/inward/record.url?scp=80053478610&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=80053478610&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:80053478610

SN - 9781612841670

T3 - Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011

BT - Proceedings of the 2011 14th European Conference on Power Electronics and Applications, EPE 2011

ER -