The purpose of this paper is to present a complete experimentation of the two failure modes in competition that can appear during short-circuit (SC) fault operation of single-chip 1,2 kV SiC MOSFETs from different manufacturers including planar and trench-gate structures, well-known or recent devices. Ruggedness and selective failure modes are identified in relation with the power density dissipated by the chip and the simulated 1D-thermal junction. Finally, the chips of the devices which failed in a “fail-to-open” mode have been studied in order to find the physical reasons of this original and unusual fail-safe mode.
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Atomic and Molecular Physics, and Optics
- Safety, Risk, Reliability and Quality
- Condensed Matter Physics
- Surfaces, Coatings and Films
- Electrical and Electronic Engineering