Abstract
This paper presents results showing the robustness of different SiC JFET transistors from SiCED in current limitation regime or short-circuit operation. Crystal temperature during failure was estimated after different electrical characterizations and using appropriate models of saturation current which is used as a thermal indicator. This work shows the exceptional robustness of SiC JFET transistors in current limitation mode compared to Si devices (MOSFETS and IGBTs).
| Original language | English |
|---|---|
| Pages (from-to) | 1358-1362 |
| Number of pages | 5 |
| Journal | Microelectronics Reliability |
| Volume | 49 |
| Issue number | 9-11 |
| DOIs | |
| Publication status | Published - 1 Sep 2009 |
| Externally published | Yes |
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Atomic and Molecular Physics, and Optics
- Condensed Matter Physics
- Safety, Risk, Reliability and Quality
- Surfaces, Coatings and Films
- Electrical and Electronic Engineering
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Cite this
Berkani, M., Lefebvre, S., Boughrara, N., Khatir, Z., Faugières, J. C., Friedrichs, P., & Haddouche, A. (2009). Estimation of SiC JFET temperature during short-circuit operations. Microelectronics Reliability, 49(9-11), 1358-1362. https://doi.org/10.1016/j.microrel.2009.06.024