Abstract
The purpose of this paper is to present a complete experimentation of the two failure modes in competition that can appear during short-circuit (SC) fault operation of single-chip 1,2 kV SiC MOSFETs from different manufacturers including planar and trench-gate structures, well-known or recent devices. Ruggedness and selective failure modes are identified in relation with the power density dissipated by the chip and the simulated 1D-thermal junction. Finally, the chips of the devices which failed in a “fail-to-open” mode have been studied in order to find the physical reasons of this original and unusual fail-safe mode.
| Original language | English |
|---|---|
| Pages (from-to) | 598-603 |
| Number of pages | 6 |
| Journal | Microelectronics Reliability |
| Volume | 88-90 |
| DOIs | |
| Publication status | Published - 1 Sep 2018 |
| Externally published | Yes |
Keywords
- Failure analysis
- Failure mode
- Power MOSFET
- Reliability
- Short-circuit
- Silicon Carbide (SiC)
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Atomic and Molecular Physics, and Optics
- Safety, Risk, Reliability and Quality
- Condensed Matter Physics
- Surfaces, Coatings and Films
- Electrical and Electronic Engineering
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Cite this
Boige, F., Richardeau, F., Lefebvre, S., Blaquière, J. M., Guibaud, G., & Bourennane, A. (2018). Ensure an original and safe “fail-to-open” mode in planar and trench power SiC MOSFET devices in extreme short-circuit operation. Microelectronics Reliability, 88-90, 598-603. https://doi.org/10.1016/j.microrel.2018.07.026